•哈佛大學提供的16 MHzSTM8內核
體系結構和三級管線
•擴展指令集
回憶
•程序存儲器:8kbyte閃存;數據
100次循環(huán)后在55°C下保持20年
•內存:1千字節(jié)
•數據存儲器:128字節(jié)真實數據EEPROM;
耐久性高達100 k的寫入/擦除周期
時鐘、重置和供應管理
•2.95 V至5.5 V工作電壓
•靈活的時鐘控制,4個主時鐘源
–低功率晶體諧振器振蕩器
–外部時鐘輸入
–內部,用戶可微調16 MHz RC
–內部低功率128 kHz RC
•帶時鐘監(jiān)視器的時鐘安全系統
•電源管理
–低功率模式(等待、活動停止、停止)
–單獨關閉外圍時鐘
–活躍,低消耗
通電和斷電復位
中斷管理
•具有32個中斷的嵌套中斷控制器
•6個向量上多27個外部中斷



Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended instruction set Memories • Program memory: 8 Kbyte Flash memory; data retention 20 years at 55 °C after 100 cycles • RAM: 1 Kbyte • Data memory: 128 bytes true data EEPROM; endurance up to 100 k write/erase cycles Clock, reset and supply management • 2.95 V to 5.5 V operating voltage • Flexible clock control, 4 master clock sources – Low-power crystal resonator oscillator – External clock input – Internal, user-trimmable 16 MHz RC – Internal low-power 128 kHz RC • Clock security system with clock monitor • Power management – Low-power modes (wait, active-halt, halt) – Switch-off peripheral clocks individually – Permanently active, low-consumption power-on and power-down reset Interrupt management • Nested interrupt controller with 32 interrupts • Up to 27 external interrupts on 6 vectors






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